Pixels in an image can be represented by a pattern of bits having values indicative of luminescence levels. Image processing often requires the addition of bits in a 16, 32, or 64 bit word to obtain relative intensity levels or to achieve smoothing. For example, adding together the first three bytes of a 32 bit word can be used to find the average intensity in a 3.times.3 region of an image. When the intensity of a portion of an image is desired, certain bytes can be masked such that only the bytes representing the portion are added. This operation is known as a masked-byte add operation.
One conventional method of performing a masked-byte add operation involves the use of additional "adder" hardware. Although useful, such additional hardware can increase the cost and complexity of the image processing ship, while decreasing the speed and efficiency at which the system operates.
It is therefore an object of the present invention to provide a method and apparatus for performing a masked-byte add operation using conventional hardware in an image processing chip.